This paper presents optimization techniques devised to a hardware ray tracing engine which has been developed for mobile platforms. Whereas conventional designs deal with either fixed-point or floating-point numbers, the proposed techniques are based on hybrid number representations with fixed-point and floating-point ones. Carefully mixing the two heterogeneous number representations in computation and value encoding could improve efficiency of the ray tracing engine in terms of both energy and silicon area. Compared to a floating-point-based design, 35% and 16% area reduction was achieved in ray-box and ray-triangle intersection units, respectively. In addition, such hybrid representation could encode a bounding box in 40% smaller space at a reasonably low cost.

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Presenter(s)

Seok Joong Hwang , Samsung Advanced Institute of Technology (SAIT)

Jaedon Lee , Samsung Advanced Institute of Technology (SAIT)

Youngsam Shin , Samsung Advanced Institute of Technology (SAIT)

Won-Jong Lee , Samsung Advanced Institute of Technology (SAIT)

Soojung Ryu , Samsung Advanced Institute of Technology (SAIT)